The advent of the system-on-a-chip (SOC) architectures for embedded systems has created many challenges for the software development systems used to develop and debug software applications that execute on these architectures. These systems may be comprised of multiple interconnected processors that share the use of on-chip and off-chip memory. A processor may include some combination of instruction cache (ICache) and data cache (DCache) to improve processing performance and can be instantiated from a design library as a single megacell. Furthermore, multiple megacells, with memory being shared among them, may be incorporated in a single embedded system. The processors may physically share the same memory without accessing data or executing code located in the same memory locations or they may use some portion of the shared memory as common shared memory.
Common shared memory contains executable code or data that will be accessed or executed by more than one processor, possibly simultaneously. While such memory sharing is advantageous in the final product, it creates potential debugging problems during application development. If a software breakpoint (SWBP) is set in common shared memory, all processors that access that shared memory location must honor the breakpoint. Also, if one processor halts at the breakpoint, any other processor that could potentially access that shared memory location should also be halted to ensure that no breakpoints are missed and invalid code is not executed.